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ISL54206A
Data Sheet June 25, 2007 FN6515.0
MP3/USB 2.0 High Speed Switch with Negative Signal Handling
The Intersil ISL54206A dual SPDT (Single Pole/Double Throw) switches combine low distortion audio and accurate USB 2.0 high speed data (480Mbps) signal switching in the same low voltage device. When operated with a 2.7V to 3.6V single supply these analog switches allow audio signal swings below-ground, allowing the use of a common USB and audio headphone connector in Personal Media Players and other portable battery powered devices. The ISL54206A logic control pins are 1.8V compatible which allows for control via a standard controller. With a VDD voltage in the range of 2.7V to 3.6V the IN pin voltage can exceed the VDD rail allowing for the USB 5V VBUS voltage from a computer to directly drive the IN pin to switch between the audio and USB signal sources in the portable device. The part has an audio enable control pin to open all the switches and put the part in a low power state. The ISL54206A is available in a small 10 Ld 2.1mmx1.6mm ultra-thin TQFN package and a 10 Ld 3mmx3mm TDFN package. It operates over a temperature range of -40 to +85C.
Features
* High Speed (480Mbps) and Full Speed (12Mbps) Signaling Capability per USB 2.0 * Low Distortion Negative Signal Capability * Control Pin to Open all Switches and Enter Low Power State * Low Distortion Headphone Audio Signals - THD+N at 20mW into 32 Load . . . . . . . . . . . . . <0.1% * Cross-talk Audio Channels (20Hz to 20kHz) . . . . . -110dB * Single Supply Operation (VDD) . . . . . . . . . . . . 2.5V to 5.5V * -3dB Bandwidth USB Switches . . . . . . . . . . . . . . . 630MHz * Available in TQFN and TDFN Packages * Pb-Free Plus Anneal (RoHS Compliant) * Compliant with USB 2.0 Short Circuit Requirements Without Additional External Components
Applications
* MP3 and Other Personal Media Players * Cellular/Mobile Phones * PDA's * Audio/USB Switching
Related Literature
* Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)" * Application Note AN557 "Recommended Test Procedures for Analog Switches"
Application Block Diagram
VDD ISL54206A USB AND HEADPHONE JACK IN VBUS LOGIC CIRCUITRY 4M DCOMD+ CTRL
CONTROLLER
USB HIGH-SPEED TRANSCEIVER
COM+
50k
L R CODEC
50k
GND
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL54206A Pinouts
(Note 1) ISL54206A (10 LD TQFN) TOP VIEW
CTRL
ISL54206A (10 LD TDFN) TOP VIEW
10
4M 9 8 7 6 50k 50k DD+
VDD IN COM -
1 2 3 4 5 50k LOGIC CONTROL
4M
10 9 8 7 6
CTRL DD+
VDD IN COM -
1 2 3 4
LOGIC CONTROL
L R
COM + GND
L R
COM +
50k
5 GND
NOTE: 1. ISL54206A Switches shown for IN = Logic "0" and CTRL = Logic "1".
Truth Table
ISL54206A IN 0 0 1 CTRL 0 1 X L, R OFF ON OFF D+, DOFF OFF ON
Pin Descriptions
ISL54206A PIN NO. 1 2 3 4 5 6 7 8 9 10 NAME VDD IN COMCOM+ GND R L D+ DCTRL Power Supply Digital Control Input Voice and Data Common Pin Voice and Data Common Pin Ground Connection Audio Right Input Audio Left Input USB Differential Input USB Differential Input Digital Control Input (Audio Enable) FUNCTION
IN: Logic "0" when 0.5V, Logic "1" when 1.4V with 2.7V to 3.6V supply. CTRL: Logic "0" when 0.5V or Floating, Logic "1" when 1.4V with 2.7V to 3.6V supply.
Ordering Information
PART NUMBER (Note) ISL54206AIRTZ ISL54206AIRTZ-T ISL54206AIRUZ-T PART MARKING 06AZ 06AZ FU TEMP. RANGE (C) -40 to +85 -40 to +85 -40 to +85 PACKAGE (Pb-Free) 10 Ld 3mmx3mm TDFN 10 Ld 3mmx3mm TDFN Tape and Reel 10 Ld Col TQFN PKG. DWG. # L10.3x3A L10.3x3A L10.2.1X1.6A
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate or NiPdAu termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
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Absolute Maximum Ratings
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 6.0V Input Voltages D+, D-, L, R (Note 2) . . . . . . . . . . . . . . . . . - 2V to ((VDD) + 0.3V) IN (Note 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2V to 5.5V CTRL (Note 2) . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((VDD) + 0.3V) Output Voltages COM-, COM+ (Note 2) . . . . . . . . . . . . . . . . -2V to ((VDD) + 0.3V) Continuous Current (Audio Switches). . . . . . . . . . . . . . . . . 150mA Peak Current (Audio Switches) (Pulsed 1ms, 10% Duty Cycle, Max). . . . . . . . . . . . . . . . 300mA Continuous Current (USB Switches). . . . . . . . . . . . . . . . . . . 40mA Peak Current (USB Switches) (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . 100mA ESD Rating: HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >7kV MM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >400V CDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>1.4kV
Thermal Information
Thermal Resistance (Typical, Note 3) JA (C/W) 10 Ld TQFN Package . . . . . . . . . . . . . . . . . . . . . . . 130 10 Ld 3x3 TDFN Package. . . . . . . . . . . . . . . . . . . . . 110 Maximum Junction Temperature (Plastic Package) . . . . . . . +150C Maximum Storage Temperature Range . . . . . . . . . -65C to +150C Pb-free reflow profile. . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.
NOTES: 2. Signals on D+, D-, L, R, COM-, COM+, CTRL, IN exceeding VDD or GND by specified amount are clamped. Limit current to maximum current ratings. 3. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.3V, GND = 0V, VINH = 1.4V, VINL = 0.5V, VCTRLH = 1.4V,
VCTRLL = 0.5V, (Notes 4), unless otherwise specified. PARAMETER ANALOG SWITCH CHARACTERISTICS Audio Switches (L, R) Analog Signal Range, VANALOG ON Resistance, RON VDD = 3.0V, IN = 0.5V, CTRL = 1.4V VDD = 5.0V, IN = 0V, CTRL = VDD, ICOMx = 40mA, VL or VR = -0.85V to 0.85V, (See Figure 3) VDD = 4.2V, IN = 0V, CTRL = VDD, ICOMx = 40mA, VL or VR = -0.85V to 0.85V, (See Figure 3) VDD = 2.85V, IN = 0V, CTRL = VDD, ICOMx = 40mA, VL or VR = -0.85V to 0.85V, (See Figure 3) VDD = 3.0V, IN = 0.5V, CTRL = 1.4V, ICOMx = 40mA, VL or VR = -0.85V to 0.85V, (See Figure 3) VDD = 3.0V, IN = 0.5V, CTRL = 1.4V, ICOMx = 40mA, VL or VR = Voltage at max RON over signal range of -0.85V to 0.85V, (Note 7) VDD = 3.0V, IN = 0.5V, CTRL = 1.4V, ICOMx = 40mA, VL or VR = -0.85V to 0.85V, (Note 6) VDD = 3.6V, IN = 0V, CTRL = 3.6V, VCOM- or VCOM+ = -0.85V, 0.85V, VL or VR = -0.85V, 0.85V, VD+ and VD- = floating, Measure current through the discharge pull-down resistor and calculate resistance value. Full 25 -1.5 2.47 1.5 V TEST CONDITIONS TEMP MIN (C) (Notes 5, 8) TYP MAX (Notes 5, 8) UNITS
ON Resistance, RON
25
-
2.50
-
ON Resistance, RON
25
-
2.87
-
ON Resistance, RON
25 Full 25 Full 25 Full 25
-
2.65 0.02 0.03 50
4.0 5.5 0.13 0.16 0.05 0.07 -
k
RON Matching Between Channels, RON RON Flatness, RFLAT(ON) Discharge Pull-Down Resistance, RL, RR
USB Switches (D+, D-) Analog Signal Range, VANALOG ON Resistance, R(ON) VDD = 3.6V, IN = 1.4V, CTRL = 1.4V VDD = 5.0V, IN = VDD, CTRL = VDD, ICOMx = 1mA, VD+ or VD- = 5V (See Figure 4) Full +25 0 17.7 VDD V
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Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.3V, GND = 0V, VINH = 1.4V, VINL = 0.5V, VCTRLH = 1.4V,
VCTRLL = 0.5V, (Notes 4), unless otherwise specified. (Continued) PARAMETER ON Resistance, R(ON) ON Resistance, R(ON) ON Resistance, R(ON) ON Resistance, RON RON Matching Between Channels, RON RON Flatness, RFLAT(ON) OFF Leakage Current, ID+(OFF) or ID-(OFF) ON Leakage Current, IDx DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay, tD Skew, tSKEW VDD = 2.7V, RL = 50, CL = 10pF, (See Figure 1) VDD = 2.7V, RL = 50, CL = 10pF, (See Figure 1) VDD = 2.7V, RL = 50, CL = 10pF, (See Figure 2) VDD = 3.3V, IN = 3.3V, CTRL = 0V or 3.3V, RL = 45, CL = 10pF, tR = tF = 750ps at 480Mbps, (Duty Cycle = 50%) (See Figure 7) VDD = 3.3V, IN = 3.3V, CTRL = 0V or 3.3V, RL = 45, CL = 10pF, tR = tF = 750ps at 480Mbps VDD = 3.3V, IN = 3.3V, CTRL = 0V or 3.3V, RL = 45, CL = 10pF, (See Figure 7) VDD = 3.3V, IN = 0V, CTRL = 3.3V, RL = 32, f = 20Hz to 20kHz, VR or VL = 0.707VRMS (2VP-P), (See Figure 6) f = 20Hz to 20kHz, VDD = 3.0V, IN = 0V, CTRL = 3.0V, VL or VR = 0.707VRMS (2VP-P), RL = 32 Signal = 0dBm, 0.2VDC offset, RL = 50, CL = 5pF 25 25 25 25 67 48 18 50 ns ns ns ps TEST CONDITIONS VDD = 4.2V, IN = VDD, CTRL = VDD, ICOMx = 1mA, VD+ or VD- = 4.2V (See Figure 4) VDD = 2.85V, IN = VDD, CTRL = VDD, ICOMx = 1mA, VD+ or VD- = 2.85V (See Figure 4) VDD = 3.3V, IN = 1.4V, CTRL = 1.4V, ICOMx = 1mA, VD+ or VD- = 3.3V (See Figure 4) VDD = 3.6V, IN = 1.4V, CTRL = 1.4V, ICOMx = 40mA, VD+ or VD- = 0V to 400mV (See Figure 4) VDD = 3.6V, IN = 1.4V, CTRL = 1.4V, ICOMx = 40mA, VD+ or VD- = Voltage at max RONover signal range of 0V to 400mV, (Note 6) VDD = 3.6V, IN = 1.4V, CTRL = 1.4V, ICOMx = 40mA, VD+ or VD- = 0V to 400mV, (Note 6) VDD = 3.6V, IN = 0V, CTRL = 3.6V, VCOM- or VCOM+ = 0.5V, 0V, VD+ or VD- = 0V, 0.5V, VL and VR = float VDD = 3.3V, IN = 3.3V, CTRL = 0V or 3.3V, VD+ or VD- = 2.0V, VCOM- ,VCOM+ , VL and VR = float TEMP MIN (C) (Notes 5, 8) +25 +25 +25 Full 25 Full 25 Full 25 Full 25 Full 25 Full -10 -70 -10 -75 TYP 19.5 26 23.5 4.6 0.06 0.4 2 MAX (Notes 5, 8) UNITS 30 35 5 6.5 0.5 0.55 0.6 1.0 10 70 10 75 nA nA nA nA
Total Jitter, tJ Propagation Delay, tPD Crosstalk (Channel-to-Channel), R to COM-, L to COM+ Total Harmonic Distortion USB Switch -3dB Bandwidth
25 25 25
-
210 250 -110
-
ps ps dB
25 25 25 25 25
-
0.06 630 6 9 10
-
% MHz pF pF pF
D+/D- OFF Capacitance, CD+(OFF), f = 1MHz, VDD = 3.3V, IN = 0V, CTRL = 3.3V, CD-(OFF) VD- or VD+ = VCOMx = 0V, (See Figure 5) L/R OFF Capacitance, CLOFF, CROFF f = 1MHz, VDD = 3.3V, IN = 0V, CTRL = 0V or 3.3V, VL or VR = VCOMx = 0V, (See Figure 5)
COM ON Capacitance, CCOM-(ON), f = 1MHz, VDD = 3.3V, IN = 3.0V, CTRL = 0V or 3.3V, CCOM+(ON) VD- or VD+ = VCOMx = 0V, (See Figure 5) POWER SUPPLY CHARACTERISTICS Power Supply Range, VDD Positive Supply Current, IDD Positive Supply Current, IDD Positive Supply Current, IDD Positive Supply Current, IDD (Low Power State) VDD = 3.6V, IN = 0V or 3.6V, CTRL = 3.6V VDD = 4.2V, IN = 0V or 4.2V, CTRL = 4.2V VDD = 5.0V, IN = 0V or 5.0V, CTRL = 5.0V VDD = 3.6V, IN = 0V, CTRL = 0V or float
Full 25 Full 25 25 25 Full
2.5 -
6 6 8 1 -
5.5 8 10 7 140
V A A A A nA nA
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Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.3V, GND = 0V, VINH = 1.4V, VINL = 0.5V, VCTRLH = 1.4V,
VCTRLL = 0.5V, (Notes 4), unless otherwise specified. (Continued) PARAMETER DIGITAL INPUT CHARACTERISTICS Voltage Low, VINL , VCTRLL Voltage High, VINH, VCTRLH Input Current, IINL, ICTRLL Input Current, IINH Input Current, ICTRLH CTRL Pull-Down Resistor, RCTRL NOTES: 4. VLOGIC = Input voltage to perform proper function. 5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 6. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range.. 7. RON matching between channels is calculated by subtracting the channel with the highest max RON value from the channel with lowest max RON value, between L and R or between D+ and D-. 8. Parts are 100% tested at +25C. Over temperature limits established by characterization and are not production tested. VDD = 2.7V to 3.6V VDD = 2.7V to 3.6V VDD = 3.6V, IN = 0V, CTRL = 0V VDD = 3.6V, IN = 3.6V, CTRL = 0V VDD = 3.6V, IN = 0V, CTRL = 3.6V VDD = 3.6V, IN = 0V, CTRL = 3.6V Full Full Full Full Full Full 1.4 -50 -50 -2 20 20 1.1 4 0.5 50 50 2 V V nA nA A M TEST CONDITIONS TEMP MIN (C) (Notes 5, 8) TYP MAX (Notes 5, 8) UNITS
Test Circuits and Waveforms
VDD LOGIC INPUT 0V tOFF SWITCH VINPUT INPUT 90% SWITCH OUTPUT 0V tON VOUT 90% VIN VINPUT SWITCH INPUT 50% tr <20ns tf <20ns VDD C
CTRL AUDIO or USB COMx IN GND RL 50 CL 10pF VOUT
Logic input waveform is inverted for switches that have the opposite logic sense.
Repeat test for all switches. CL includes fixture and stray capacitance. RL -----------------------------V OUT = V (INPUT) R + R L ( ON ) FIGURE 1B. TEST CIRCUIT
FIGURE 1A. MEASUREMENT POINTS FIGURE 1. SWITCHING TIMES
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ISL54206A Test Circuits and Waveforms (Continued)
VDD C
CTRL D- or D+ VDD LOGIC INPUT 0V VINPUT L or R IN VIN 90% GND RL 50 CL 10pF COMx VOUT
VOUT SWITCH OUTPUT 0V tD
FIGURE 2A. MEASUREMENT POINTS
Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 2B. TEST CIRCUIT
FIGURE 2. BREAK-BEFORE-MAKE TIME
VDD C
VDD C
RON = V1/100mA
L OR R
CTRL
RON = V1/40mA
CTRL
D- OR D+
VL OR R V1 100mA
COMx
VD- OR D+ IN OV V1 40mA
COMx
IN
VDD
GND
GND
Repeat test for all switches. FIGURE 3. AUDIO RON TEST CIRCUIT
Repeat test for all switches. FIGURE 4. USB RON TEST CIRCUIT
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ISL54206A Test Circuits and Waveforms (Continued)
VDD C VDD C
CTRL
AUDIO OR USB
CTRL SIGNAL GENERATOR IN
L OR R COMx
32
IMPEDANCE ANALYZER
COMx
0V or VDD GND ANALYZER
0V
IN
COMx
R OR L
GND RL
NC.
Repeat test for all switches. Signal direction through switch is reversed, worst case values are recorded. Repeat test for all switches. FIGURE 5. CAPACITANCE TEST CIRCUIT FIGURE 6. AUDIO CROSSTALK TEST CIRCUIT
VDD tri 90% DIN+ DIN90% 50% 10% tfi tro 90% 10% OUT+ OUT90% tf0 50% tskew_o 50% 10% GND DIN+ 143 15.8 DIN143 COM10% 50% tskew_i VDD 15.8 CTRL IN COM+
C
D+ CL DCL
OUT+ 45 OUT45
|tro - tri| Delay Due to Switch for Rising Input and Rising Output Signals. |tfo - tfi| Delay Due to Switch for Falling Input and Falling Output Signals. |tskew_0| Change in Skew through the Switch for Output Signals. |tskew_i| Change in Skew through the Switch for Input Signals.
FIGURE 7A. MEASUREMENT POINTS FIGURE 7. SKEW TEST
FIGURE 7B. TEST CIRCUIT
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ISL54206A Application Block Diagrams
VDD
CONTROLLER
USB AND HEADPHONE JACK VBUS IN
ISL54206A
CTRL LOGIC CIRCUITRY USB HIGH-SPEED TRANSCEIVER
4M DCOM-
D+ 50k L R
COM+
CODEC
50k
GND
LOGIC CONTROL VIA MICRO-PROCESSOR
VDD VBUS USB AND HEADPHONE JACK IN
ISL54206A
CTRL LOGIC CIRCUITRY
CONTROLLER
22k
4M
COM-
4M DD+ 50k L R
USB HIGH-SPEED TRANSCEIVER
COM+
CODEC
50k
GND
LOGIC CONTROL VIA VBUS VOLTAGE FROM COMPUTER OR USB HUB
Detailed Description
The ISL54206A device is a dual single pole/double throw (SPDT) analog switch device that can operate from a single dc power supply in the range of 2.5V to 5.5V. It was designed to function as a dual 2 to 1 multiplexer to select between USB differential data signals and audio L and R stereo signals. It comes in tiny TQFN and TDFN packages for use in MP3 players, PDAs, cell phones, and other personal media players. The part consists of two 3 audio switches and two 5 USB switches. The audio switches can accept signals that swing below ground. They were designed to pass audio left and right stereo signals, that are ground referenced, with minimal distortion. The USB switches were designed to pass high-speed USB differential data signals with minimal edge and phase distortion.
The ISL54206A was specifically designed for MP3 players, cell phones and other personal media player applications that need to combine the audio headphone jack and the USB data connector into a single shared connector, thereby saving space and component cost. Typical application block diagrams of this functionality is shown above. The ISL54206A has a single logic control pin (IN) that selects between the audio switches and the USB switches. This pin can be driven Low or High to switch between the audio CODEC drivers and USB transceiver of the MP3 player or cellphone. The ISL54206A also contains a logic control pin (CTRL) that when driven Low while IN is Low, opens all switches and puts the part into a low power state, drawing typically 1nA of IDD current. A detailed description of the two types of switches is provided in the sections following. The USB transmission
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and audio playback are intended to be mutually exclusive operations. The USB switches are active (turned ON) whenever the IN voltage is 1.4V. Note: Whenever the USB switches are ON the audio drivers of the CODEC need to be at AC or DC ground or floating to keep from interfering with the data transmission.
Audio Switches
The two audio switches (L, R) are 3 switches that can pass signals that swing below ground by as much as 1.5V. They were designed to pass ground reference stereo signals with minimal insertion loss and very low distortion. Crosstalk between the audio switches over the audio band is < -110dB. Over a signal range of 1V (0.707Vrms) with VDD >2.7V, these switches have an extremely low rON resistance variation. They can pass ground referenced audio signals with very low distortion (<0.06% THD+N) when delivering 15.6mW into a 32 headphone speaker load. See Figures 8, Figures 9, Figures 10, and Figures 11 THD+N performance curves. These switches are uni-directional switches. The audio drivers should be connected at the L and R side of the switch (pin 7 and pin 8) and the speaker loads should be connected at the COM side of the switch (pin 3 and pin 4). The audio switches are active (turned ON) whenever the IN voltage is 0.5V and the CTRL voltage to 1.4V. Note: Whenever the audio switches are ON the USB transceivers need to be in the high impedance state or static high or low state.
ISL54206A Operation
The discussion that follows will discuss using the ISL54206A in the typical application shown in the block diagrams on page 8. VDD SUPPLY The DC power supply connected at VDD (pin 1) provides the required bias voltage for proper switch operation. The part can operate with a supply voltage in the range of 2.5V to 5.5V. In a typical USB/Audio application for portable battery powered devices the VDD voltage will come from a battery or an LDO and be in the range of 2.7V to 3.6V. For best possible USB full-speed operation (12Mbps) it is recommended that the VDD voltage be 2.5V in order to get a USB data signal level above 2.5V. LOGIC CONTROL The state of the ISL54206A device is determined by the voltage at the IN pin (pin 2) and the CTRL pin (pin 10). Refer to truth-table on page 2 of data sheet. These logic pins are 1.8V logic compatible when VDD is in the range of 2.7V to 3.6V and can be controlled by a standard processor. The CTRL pin is internally pulled low through a 4M resistor to ground and can be left floating or tri-stated by the processor. The CTRL control pin is only active when IN is logic "0". The IN pin does not have an internal pull-down resistor and must not be allowed to float. It must be driven High or Low. The voltage at the IN pin can exceed the VDD voltage by as much as 2.55V. This allows the VBUS voltage from a computer or USB hub (4.4V to 5.25V) to drive the IN pin while the VDD voltage is in the range of 2.7V to 3.6V. An external pull-down resistor is required from the IN pin to ground when directly driving the IN pin with the computer VBUS voltage. See the section titled "USING THE COMPUTER VBUS VOLTAGE TO DRIVE THE "IN' PIN". Logic control voltage levels: IN = Logic "0" (Low) when IN 0.5V IN = Logic "1" (High) when IN 1.4V CTRL = Logic "0" (Low) when 0.5V or floating. CTRL = Logic "1" (High) when 1.4V Audio Mode If the IN pin = Logic "0" and CTRL pin = Logic "1," the part will be in the Audio mode. In Audio mode the L (left) and R (right) 3 audio switches are ON and the D- and D+ 5 USB switches are OFF (high impedance).
USB Switches
The two USB switches (D+, D-) are bidirectional switches that can pass rail-to-rail signals. When powered with a 3.6V supply these switches have a nominal r(ON) of 4.6 over the signal range of 0V to 400mV with a r(ON) flatness of 0.4. The r(ON) matching between the D+ and D- switches over this signal range is only 0.06 ensuring minimal impact by the switches to USB high speed signal transitions. As the signal level increases the r(ON) resistance increases. At signal level of 3.3V the switch resistance is nominally 23. The USB switches were specifically designed to pass USB 2.0 high-speed (480Mbps) differential signals typically in the range of 0V to 400mV. They have low capacitance and high bandwidth to pass the USB high-speed signals with minimum edge and phase distortion to meet USB 2.0 high speed signal quality specifications. See high-speed eye diagram Figure 15. The USB switches can also pass USB full-speed signals (12Mbps) with minimal distortion and meet all the USB requirements for USB 2.0 full-speed signaling. See fullspeed eye diagram Figures 12-14. The maximum signal range for the USB switches is from -1.5V to VDD. The signal voltage at D- and D+ should not be allow to exceed the VDD voltage rail or go below ground by more than -1.5V.
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FN6515.0 June 25, 2007
ISL54206A
When nothing is plugged into the common connector or a headphone is plugged into the common connector, the processor will sense that there is no voltage at the VBUS pin of the connector and will drive and hold the IN control pin of the ISL54206A low. As long as the CTRL = Logic "1," the ISL54206A part will be in the audio mode and the audio drivers of the media player can drive the headphones and play music. USB Mode If the IN pin = Logic "1" and CTRL pin = Logic "0" or Logic "1" the part will go into USB mode. In USB mode, the D- and D+ 5 switches are ON and the L and R 3 audio switches are OFF (high impedance). When a USB cable from a computer or USB hub is connected at the common connector, the processor will sense the present of the 5V VBUS and drive the IN pin voltage high. The ISL54206A part will go into the USB mode. In USB mode, the computer or USB hub transceiver and the MP3 player or cell phone USB transceiver are connected and digital data will be able to be transmitted back and forth. When the USB cable is disconnected, the processor will sense that the 5V VBUS voltage is no longer connected and will drive the IN pin low and put the part back into the Audio or Low Power Mode. Low Power Mode If the IN pin = Logic "0" and CTRL pin = Logic "0," the part will be in the Low Power mode. In the Low Power mode, the audio switches and the USB switches are OFF (high impedance). In this state, the device draws typically 1nA of current. USING THE COMPUTER VBUS VOLTAGE TO DRIVE THE "IN" PIN External IN Pull-Down Resistor Rather than using a micro-processor to control the IN logic pin you can directly drive the IN pin using the VBUS voltage from the computer or USB hub. In order to do this you must connected an external resistor from the IN pin to ground. When a headphone or nothing is connected at the common connector the external pull-down will pull the IN pin low putting the ISL54206A in the Audio mode or Low Power mode depending on the condition of the CTRL pin. When a USB cable is connected at the common connector the voltage at the IN pin will be driven to 5V and the part will automatically go into the USB mode. When the USB cable is disconnected from the common connector the voltage at the IN pin will be pulled low by the pull-down resistor and return to the Audio Mode or Low Power Mode depending on the condition of the CTRL pin. Note: The voltage at the IN pin can exceed the VDD voltage by as much as 2.55V. This allows the VBUS voltage from a computer or USB hub (4.4V to 5.25V) to drive the IN pin while the VDD voltage is in the range of 2.7V to 3.6V. External IN Series Resistor The ISL54206A contains a clamp circuit between IN and VDD. Whenever the IN voltage is greater than the VDD voltage by more than 2.55V, current will flow through this clamp circuitry into the VDD power supply bus. During normal USB operation, VDD is in the range of 2.7V to 3.6V and IN (VBUS voltage from computer or USB hub) is in the range of 4.4V to 5.25V, the clamp circuit is not active and no current will flow through the clamp into the VDD supply. In a USB application, the situation can exist where the VBUS voltage from the computer could be applied at the IN pin before the VDD voltage is up to its normal operating voltage range and current will flow through the clamp into the VDD power supply bus. This current could be quite high when VDD is OFF or at 0V and could potentially damage other components connected in the circuit. In the application circuit, a 22k resistor has been put in series with the IN pin to limit the current to a safe level during this situation. It is recommended that a current limiting resistor in the range of 10k to 50k be connected in series with the IN pin. It will have minimal impact on the logic level at the IN pin during normal USB operation and protect the circuit during the time VBUS is present before VDD is up to its normal operating voltage. Note: No external resistor is required in applications where the voltage at the IN pin will not exceed VDD by more than 2.55V.
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FN6515.0 June 25, 2007
ISL54206A Typical Performance Curves TA = +25C, Unless Otherwise Specified
0.11 RLOAD = 32 VLOAD = 0.707VRMS 0.3 0.09 VDD = 2.6V THD+N (%) 0.08 THD+N (%) 0.4 RLOAD = 32 VDD = 3V 3VP-P
0.1
0.2 2.5VP-P 0.1 2VP-P 1VP-P 20 200 2k FREQUENCY (Hz) 20k
0.07 VDD = 2.7V 0.06 VDD = 3V VDD = 3.6V
0.05
0.04 20 200 2k FREQUENCY (Hz) 20k
0
FIGURE 8. THD+N vs SUPPLY VOLTAGE vs FREQUENCY
FIGURE 9. THD+N vs SIGNAL LEVELS vs FREQUENCY
0.5 RLOAD = 32 FREQ = 1kHz VDD = 3V
0.5 RLOAD = 32 FREQ = 1kHz VDD = 3V
0.4
0.4
THD+N (%)
THD+N (%)
0.3
0.3
0.2
0.2
0.1
0.1
0 0 0.5 1 1.5 2 2.5 3 3.5 OUTPUT VOLTAGE (VP-P)
0 0 10 20 30 40 50 OUTPUT POWER (mW)
FIGURE 10. THD+N vs OUTPUT VOLTAGE
FIGURE 11. THD+N vs OUTPUT POWER
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FN6515.0 June 25, 2007
ISL54206A Typical Performance Curves TA = +25C, Unless Otherwise Specified
(Continued)
VDD=5.5V
VOLTAGE SCALE (0.5V/DIV)
TIME SCALE (10ns/DIV)
FIGURE 12. EYE PATTERN: 12MBps WITH SWITCHES IN THE SIGNAL PATH
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FN6515.0 June 25, 2007
ISL54206A Typical Performance Curves TA = +25C, Unless Otherwise Specified
(Continued)
VDD=3.3V
VOLTAGE SCALE (0.5V/DIV)
TIME SCALE (10ns/DIV)
FIGURE 13. EYE PATTERN: 12MBps WITH SWITCHES IN THE SIGNAL PATH
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FN6515.0 June 25, 2007
ISL54206A Typical Performance Curves TA = +25C, Unless Otherwise Specified
(Continued)
VDD=2.5V
VOLTAGE SCALE (0.5V/DIV)
TIME SCALE (10ns/DIV)
FIGURE 14. EYE PATTERN: 12MBps WITH SWITCHES IN THE SIGNAL PATH
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FN6515.0 June 25, 2007
ISL54206A Typical Performance Curves TA = +25C, Unless Otherwise Specified
(Continued)
VDD = 3.3V VDD = 3.3V
VOLTAGE SCALE (0.1V/DIV)
TIME SCALE (0.2ns/DIV.)
FIGURE 15. EYE PATTERN: 480MBps USB SIGNAL WITH SWITCHES IN THE SIGNAL PATH
1 USB SWITCH 0 -1 NORMALIZED GAIN (dB) -2
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP): GND (TDFN Paddle Connection: Tie to GND or Float) TRANSISTOR COUNT:
-3 -4
98 PROCESS: Submicron CMOS
RL = 50 VIN = 0.2VP-P to 2VP-P 1M 10M 100M FREQUENCY (Hz) 1G
FIGURE 16. FREQUENCY RESPONSE
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FN6515.0 June 25, 2007
ISL54206A Ultra Thin Quad Flat No-Lead Plastic Package (UTQFN)
D A B
L10.2.1x1.6A
10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE MILLIMETERS SYMBOL MIN 0.45 NOMINAL 0.50 0.127 REF 0.15 2.05 1.55 0.20 2.10 1.60 0.50 BSC 0.20 0.35 0.40 10 4 1 0 12 0.45 0.25 2.15 1.65 MAX 0.55 0.05 NOTES 5 2 3 3 4 Rev. 3 6/06 NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. 3. Nd and Ne refer to the number of terminals on D and E side, respectively. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. Maximum package warpage is 0.05mm. 8. Maximum allowable burrs is 0.076mm in all directions. 9. Same as JEDEC MO-255UABD except: No lead-pull-back, "A" MIN dimension = 0.45 not 0.50mm "L" MAX dimension = 0.45 not 0.42mm. 10. For additional information, to assist with the PCB Land Pattern Design effort, see Intersil Technical Brief TB389.
6 INDEX AREA 2X 2X 0.10 C
N
E
1 0.10 C
2
A A1
TOP VIEW
A3 b
0.10 C 0.05 C SEATING PLANE A1 SIDE VIEW (DATUM A) PIN #1 ID 1 2 NX L N (DATUM B) N-1 e 3 (ND-1) X e BOTTOM VIEW C L NX (b) 5 SECTION "C-C" CC e (A1) NX b 5 A
C
D E e k L N
4xk
Nd Ne
0.10 M C A B 0.05 M C
L
TERMINAL TIP
FOR ODD TERMINAL/SIDE
b
2.50 1.75 0.05 MIN L 2.00 0.80 0.275
0.10 MIN DETAIL "A" PIN 1 ID 0.50 LAND PATTERN 10 0.25
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FN6515.0 June 25, 2007
ISL54206A Thin Dual Flat No-Lead Plastic Package (TDFN)
2X 0.10 C A A D 2X 0.10 C B
L10.3x3A
10 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE MILLIMETERS SYMBOL A A1
E
MIN 0.70 -
NOMINAL 0.75 0.20 REF
MAX 0.80 0.05
NOTES -
6 INDEX AREA TOP VIEW B
A3 b D D2 E
// A 0.10 C 0.08 C
0.20 2.95 2.25 2.95 1.45
0.25 3.0 2.30 3.0 1.50 0.50 BSC
0.30 3.05 2.35 3.05 1.55
5, 8 7, 8 7, 8 -
E2 e k
0.25 0.25
0.30 10 5
0.35
8 2 3 Rev. 3 3/06
C SEATING PLANE
SIDE VIEW
A3
L N
D2 (DATUM B) 1 2 D2/2
7
8
Nd NOTES:
6 INDEX AREA (DATUM A)
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
NX k E2 E2/2
2. N is the number of terminals. 3. Nd refers to the number of terminals on D. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature.
NX L N 8 N-1 NX b e (Nd-1)Xe REF. BOTTOM VIEW C L NX (b) 5 SECTION "C-C" CC e TERMINAL TIP (A1) L1 9L 5 0.10 M C A B
7. Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 9. Compliant to JEDEC MO-229-WEED-3 except for D2 dimensions.
FOR ODD TERMINAL/SIDE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 17
FN6515.0 June 25, 2007

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